Learning to Design Circuits

Hanrui Wang*, Jiacheng Yang*, Hae-Seung Lee, Song Han
Massachusettes Institute of Technology


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Abstract

Analog IC design relies on human experts to search for parameters that satisfy circuit specifications with their experience and intuitions, which is highly labor intensive, time consuming and suboptimal.

Machine learning is a promising tool to automate this process. However, supervised learning is difficult for this task due to the low availability of training data: 1) Circuit simulation is slow, thus generating large-scale dataset is time-consuming; 2) Most circuit designs are propitiatory IPs within individual IC companies, making it expensive to collect large-scale datasets.

We propose Learning to Design Circuits (L2DC) to leverage reinforcement learning that learns to efficiently generate new circuits data and to optimize circuits. We fix the schematic, and optimize the parameters of the transistors automatically by training an RL agent with no prior knowledge about optimizing circuits. After iteratively getting observations, generating a new set of transistor parameters, getting a reward, and adjusting the model, L2DC is able to optimize circuits.

We evaluate L2DC on two transimpedance amplifiers. Trained for a day, our RL agent can achieve comparable or better performance than human experts trained for a quarter. It first learns to meet hard-constraints (eg. gain, bandwidth), and then learns to optimize good-to-have targets (eg. area, power). Compared with grid search-aided human design, L2DC can achieve $\mathbf{250}\boldsymbol{\times}$ higher sample efficiency with comparable performance. Under the same runtime constraint, the performance of L2DC is also better than Bayesian Optimization.

Paper

Learning to Design Circuits
Hanrui Wang*, Jiacheng Yang*, Hae-Seung Lee, Song Han

Results

Performances on Three-stage Transimpedence Amplifier

Number of
Simulations
Sample
Efficiency
Time Bandwidth
($\mathrm{MHz}$)
Gain
($\mathrm{k\Omega}$)
Power
($\mathrm{mW}$)
Gate Area
($\mathrm{\mu m}$)
Score
Spec - - - 90.0 20.0 3.00 - -
Human
Expert
10,000,000 1 - 90.1 20.2 1.37 211 0.00
Random 40,000 - 30h 57.3 20.7 1.37 146 -0.02
Bayesian
Opt.
1,160 - 30h 72.5 21.1 4.25 130 -0.01
Ours 40,000 250 30h 92.5 20.7 2.50 90 2.88

Performances on Three-stage Transimpedence Amplifier

Number of
Simulations
Sample
Efficiency
Time Noise
($\mathrm{pA/\sqrt{Hz}}$)
Gain
($\mathrm{dB\Omega}$)
Peaking
($\mathrm{dB}$)
Power
($\mathrm{mW}$)
Gate
Area
($\mathrm{\mu m}$)
Band-
width
($\mathrm{GHz}$)
Score
Spec - - - 19.3 57.6 1.000 18.0 - max. -
Human
Expert
1,289,618 1 - 18.6 57.7 0.927 8.11 6.17 5.95 0.00
Random 50,000 - 40h 19.8 58.0 0.448 4.39 2.93 5.60 -0.08
Bayesian
Opt.
880 - 40h 19.6 58.6 0.629 4.24 5.69 5.16 -0.15
Ours 50,000 25 40h 19.2 58.1 0.963 3.18 2.61 5.78 -0.03